Conference Publications

2025

·    Junseob So, Youngwook Kwon, Seungwoo Park, Seongcheol Kim, Changmin Shim, Hwaseok Shin, Seonbeen Lee, Taehwan Kim, and

Chulwoo Kim, "A 0.3pJ/b 32Gb/s/pin Single-Ended PAM-4 Receiver with Delay-less Capacitive Feedback Equalizer," accepted for IEEE

 International Solid-State Circuits Conference.

2023

·    Seungwoo Park, Yoonjae Choi, Jincheol Sim, Jonghyuck Choi, Hyunsu Park, Youngwook Kwon, and Chulwoo Kim, "A 0.83pJ/b 52Gb/s PAM-4 Baud-Rate CDR with Pattern-Based Phase Detector for Short-Reach Applications," IEEE International Solid-State Circuits Conference, Feb. 2023,

pp. 118-120.

2022

·    Hyunjin Kim, Taehyeong Park, and Chulwoo Kim, "A 97.9% Peak Efficiency 9 V Output Three-Switch Hybrid Buck–Boost Power Stage Using 5 V CMOS," IEEE 65th International Midwest Symposium on Circuits and Systems, Aug. 2022, pp. 1-4.

·    Hyunjin Kim, Changhun Park, and Chulwoo Kim, "An Output-Boosted 3-ratio Switched-Capacitor DC–DC Converter with 0.5-to-1.8 V Output Voltage Range for Low-Power IoT Applications," IEEE 65th International Midwest Symposium on Circuits and Systems, Aug. 2022, pp. 1-4.

·    Jeehwan Lee, Yoonjae Choi, and Chulwoo Kim, "A 266-3750 MHz Wide-Range Adaptive Phase-Rotator-Based All Digital DLL for LPDDR5 Controllers," IEEE International Symposium on Circuits and Systems, May 2022, pp. 2177-2181.

·   Jongmin Kim, Juhyung Lee, Yeongrok Lee, Hongseol Cha, Hyunsu Park, Jincheol Sim, Chulwoo Kim, and Youngchai Ko, "Experimental Demonstration of RoFSO Transmission Combining WLAN Standard and WDM-FSO over 100m Distance," IEEE Conference on Computer Communications Workshops, May 2022, pp. 1-2.

·   Hyunsu Park, Yoonjae Choi, Jincheol Sim, Jonghyuck Choi, Youngwook Kwon, Junyoung Song, and Chulwoo Kim, "A 0.385pJ/bit 10Gb/s TIA-terminated Di-code Transceiver with Edge-delayed Equalization, ECC, and Mismatch Calibration for HBM Interfaces," IEEE International Solid-State Circuits Conference, Mar. 2022, pp. 452-453.

2021

·    Jincheol Sim, Hyunsu Park, Youngwook Kwon, Seongcheol Kim, and Chulwoo Kim, "A 1-3.2 GHz 0.6 mW/GHz Duty-Cycle-Corrector using Bangbang Duty-Cyle-Detector," IEEE International Symposium on Circuits and Systems, May 2021, pp. 1-4.

·    Jinwoo Jeon, Junyoung Maeng, Inho Park, Hyunjin Kim, and Chulwoo Kim, "A Hybrid DC-DC Converter Capable of Supplying
Heavy Load in Step-Up and Step-Down Mode," IEEE International Symposium on Circuits and Systems, May 2021, pp. 1-5.

·    Inho Park, Jinseok Oh, and Chulwoo Kim, "A Power Management System Based on Adaptive Low-Dropout Voltage Regulator with Optimal Reference Pre-Compensation Technique," IEEE International Symposium on Circuits and Systems, May 2021, pp. 1-4.

2020

·    Soonsung Ahn, Jaegeun Song, Chaegang Lim, Yohan Choi, Sooho Park, Yunsoo Park, and Chulwoo Kim, "A 1 MS/s 9.15 ENOB Low-Power SAR ADC with Triple-Charge-Sharing Technique," IEEE International SoC Design Conference, Oct. 2020, pp. 1-2.

2019

·    Inho Park, Junyoung Maeng, Minseob Shim, Junwon Jeong, and Chulwoo Kim, "A Bidirectional High-Voltage Dual-Input Buck Converter for Triboelectric Energy-Harvesting Interface Achieving 70.72% End-to-End Efficiency," IEEE Symposium on VLSI Circuits, Jun. 2019, pp. 326-327.

·   Hyunsu Park, Junyoung Song, Yeonho Lee, Jincheol Sim, Jonghyuck Choi, and Chulwoo Kim, "23.3 A 3bit/2UI 27Gb/s PAM-3 Single-Ended Transceiver Using One-Tap DFE for Next-Generation Memory Interface," IEEE International Solid-State Circuits Conference, Feb. 2019,

pp. 382-383.

2018

·   Jeongsik Yoo, Doyoun Kim, Hyunsu Park, Minseob Shim, Choonghwan Lee, and Chulwoo Kim, "Physically Unclonable Function Using Ring Oscillator Collapse in 0.5 V Near-Threshold Voltage for Low-Power Internet of Things," IEEE International Conference on Consumer Electronics,

Jun. 2018, pp. 206-212.

·   Inho Park, Junyoung Maeng, Dongju Lim, Minseob Shim, Junwon Jeong, Chulwoo Kim, "A 4.5-to-16μW Integrated Triboelectric Energy Harvesting System Based on High-Voltage Dual-Input Buck Converter with MPPT and 70V Maximum Input Voltage," IEEE International Solid-State Circuits Conference, Feb. 2018, pp. 146-147.

·   Jeongsik Yoo, Yeonho Lee, Yoonjae Choi, Hyunsu Park, Chulwoo Kim, "31% Reduction of Power Consumption Using Active Inductor at TX and AC Termination at RX for A Low-Power Post-LPDDR4 Interfaces," International Conference on Electronics, Information, and Communication,

Jan. 2018, pp. 1-4.

2017

·    Junwon Jeong, Seokhyeon Jeong, Chulwoo Kim, Dennis Sylvester and David Blaauw, "A 42nJ/conversion On-Demand State-of-Charge Indicator for Miniature IoT Li-ion Batteries," IEEE Symposium on VLSI Circuits, Jun. 2017, pp. 206-207.

·    Yeonho Lee, Yoonjae Choi, Sang-Geun Bae, Jaehun Jun, Junyoung Song, Sewook Hwang, and Chulwoo Kim, “12Gb/s Over Four Balanced Lines Utilizing NRZ Braid Clock Signaling with 100% Data Payload and Spread Transition Scheme for 8K UHD Intra-panel Interfaces,” IEEE International Solid-State Circuits Conference, Feb. 2017, pp. 490-491.

2016

·    Sewook Hwang, Sungjun Moon, Junyoung Song, Chulwoo Kim, "A 32Gbps Rx Only Equalization Transceiver with 1-tap Speculative FIR and 2-tap Direct IIR DFE", IEEE Symposium on VLSI Circuits, Jun. 2016, pp. 46-47.

·    Minseob Shim, Seokhyeon Jeong, Paul Myers, Suyoung Bang, Chulwoo Kim, Dennis Sylvester, David Blaauw, Wanyeong Jung, "An Oscillator Colapse-Based Comparator with Application in a 74.1dB SNDR, 20kS/s 15b SAR ADC," IEEE Symposium on VLSI Circuits, Jun. 2016, pp.158-159.

·    M. Choi, T. Jang, J. Jeong, S. Jeong, D. Blaauw, D. Sylvester, "A Current-Mode Wireless Power Receiver with Optimal Resonant Cycle Tracking for Implantable Systems," IEEE International Solid-State Circuits Conference, Feb. 2016, pp. 372-373.

·    W. Jung, J. Gu, P. D. Myers, M. Shim, S. Jeong, K. Yang, M. Choi, Z. Foo, S. Bang, S. Oh, D. Sylvester, D. Blaauw, "A 60%-Efficiency 20nW-500μW Tri-Output Fully Integrated Power Management Unit with Environmental Adaptation and Load-Proportional Biasing for IoT Systems,"  IEEE International Solid-State Circuits Conference, Feb. 2016, pp. 154-155.

2015

·    Junyoung Song, Hyun-Woo Lee, Jayoung Kim, and Chulwoo Kim, "1V 10Gb/s/pin Single-Ended Transceiver with Controllable Active-Inductor-Based Driver and Adaptively Calibrated Cascade-DFE for Post-LPDDR4 Interfaces," IEEE International Solid-State Circuits Conference, Feb. 2015, pp. 320-321.

2014

·    Minseob Shim, Jungmoon Kim, Junwon Jung, and Chulwoo Kim, " Self-Powered 30uW to 10mW Piezoelectric Energy Harvesting System with 9.09ms/V Maximum Power Point Tracking Time," IEEE International Solid-State Circuits Conference, Feb. 2014, pp. 406-407.

·    Hyun-Woo Lee, Junyoung Song, S-A. Hyun, S. Baek, Y. Lim, J. Lee, M. Park, H. Choi, C. Chio, J. Cha, J. Kim, H. Choi, S. Kwack, Y. Kang, J. Kim, J. Park, J. Kim, J. Cho, Chulwoo Kim, Y. Kim, J. Lee, B. Chung, and S. Hong, "A 1.35V-5.0Gb/s/pin GDDR5M with 5.4mW standby power and an error-adaptive duty cycle corrector, "  IEEE International Solid-State Circuits Conference, Feb. 2014, pp. 434-435.

·    Jungmoon Kim, Philip K. T. Mok, and Chulwoo Kim, "A 0.15V Input Energy Harvesting Charge Pump with Switching Body Biasing and Adaptive Dead-Time for Efficiency Improvement, "  IEEE International Solid-State Circuits Conference, Feb. 2014, pp. 394-395.

2013

·    Junyoung Song, Hyun-Woo Lee, Soobin Lim, Sewook Hwang, Yunsaing Kim, Young-Jung Choi, Byong-Tae Chung, and Chulwoo Kim, "An adaptive bandwidth PLL for avoiding noise interference and DFE-less fast pre-charge sampling for over 10Gb/s/pin Graphics DRAM interface, "  IEEE International Solid-State Circuits Conference, Feb. 2013, pp. 312-313.

2012

·    Sewook Hwang, Inhwa Jung, Junyoung Song, and Chulwoo Kim, "A 5.4Gb/S Adaptive Equalizer with Unit Pulse Charging Technique in 0.13μm CMOS, " IEEE International Symposium on Circuits and Systems, May 2012, pp.1959-1962.

·    Hyun-Woo Lee, Soobin Lim, Junyoung Song, Ja-Beom Koo, Dae-Han Kwon, Jong-Ho Kang, Young-Jung Choi, Kunwoo Park, Byong-Tae Chung, and Chulwoo Kim, "A 283.2uW 800Mb/s/pin DLL-Based Data Self-Aligner for Through Silicon Via(TSV) Interface, " IEEE International Solid-State Circuits Conference, Feb. 2012, pp. 48-50.

2011

·    Jungmoon Kim, Dongseok Kim, and Chulwoo Kim, "A Single-Inductor 8-channel Output DC-DC Boost Converter with Time-limited One-shot Current Control and Single Shared Hysteresis Comparator," IEEE Symposium on VLSI Circuits, Jun. 2011, pp.14-15.

·    Hyun-Woo Lee, Ki-Han Kim, Young-Kyoung Choi, Ju-Hwan Shon, Nak-Kyu Park, Kwan-Weon Kim, Chulwoo Kim, Young-Jung Choi, and Byong-Tae Chung, "A 1.6V 1.4Gbps/pin Consumer DRAM with Self-Dynamic Voltage Scaling Technique in 44nm CMOS Technology," IEEE International Solid-State Circuits Conference, Feb. 2011, pp. 502-504.

·    Sewook Hwang, Minyoung Song, Youngho Kwak, Inhwa Jung and Chulwoo Kim, "A 0.076mm2 3.5GHz Spread-Spectrum Clock Generator with Newton-Raphson Modulation in 0.13um CMOS," IEEE International Solid-State Circuits Conference, Feb. 2011, pp.

360-362.

2010

·    Dong Seok Kim, Jungmoon Kim, Jihwan Kim, and Chulwoo Kim, " An On-chip Soft-start Technique of Current-mode DC-DC Converter for Biomedical Applications," IEEE Asia Pacific Conference of Circuits and Systems, Dec. 2010, pp. 500-503.

·    Sang-Yoon Lee, Hyung-Rok Lee, Young-Ho Kwak, Byung-Joo Yoo, Daeyun Shim, Chulwoo Kim and Deog-Kyoon Jeong, "250Mbps-5Gbps Wide-Range CDR with Digital Vernier Phase Shifting and Dual Mode Control in 0.13um CMOS," IEEE Asian Solid-State Circuits Conference, Nov. 2010, pp. 185-188

·    Debashis Dhar, Young-Ho Kwak, Inhwa Jung, and Chulwoo Kim, “ An All Digital Time Amplifier with Interpolation Scheme for Low Gain Variation,” International SoC Design Conference, Nov. 2010, pp. 276-278.

·    Hyun-Woo Lee, Yong-Hoon Kim, Won-Joo Yun, Eun Young Park, Kang Youl Lee, Jaeil Kim, Kwang Hyun Kim, Jong Ho Jung, Kyung Whan Kim, Namgyu Rye, Kwan-Weon Kim, Jun Hyun Chun, Chulwoo Kim, Young-Jung Choi, Byong-Tae Chung, and Joong Sik Kih,

"A 7.7mW/1.0ns/1.35V Delay Locked Loop with Racing Mode and OA-DCC for DRAM interface," IEEE International Symposium on Circuits and Systems, May 2010, pp. 3861-3864.

2009

·    Jabeom Koo, Gil-su Kim, Junyoung Song, Kwan-Weon Kim, Young Jung Choi, and Chulwoo Kim, "Small-Area High-Accuracy ODT/OCD by calibration of Global On-Chip for 512M GDDR5 application," IEEE Custom Integrated Circuits Conference, Sep. 2009, pp. 717-720.

·   Phi-Hung Pham, Phuong Mau, and Chulwoo Kim, "A 64-PE Folded-Torus Intra-chip Communication Fabric for Guaranteed Throughput in Network-on-Chip Based Applications," IEEE Custom Integrated Circuits Conference, Sep. 2009, pp. 645-648.

·    Minyoung Song, Young-Ho Kwak, Sunghoon Ahn, Wooseok Kim, ByeongHa Park and Chulwoo Kim, "A 10MHz to 315MHz Cascaded Hybrid PLL with Piecewise Linear Calibrated TDC," IEEE Custom Integrated Circuits Conference, Sep. 2009, pp. 243-246

·    Kisoo Kim, Hokyu Lee, Sangdon Jung , Chulwoo Kim, "A 366kS/s 400uW 0.0013mm2 Frequency-to-Digital Converter Based CMOS Temperature Sensor Utilizing Multiphase Clock," IEEE Custom Integrated Circuits Conference, Sep. 2009, pp. 203-206.

·    Jungmoon Kim, Hyunho Chu, and Chulwoo Kim, "Current-mode DC-DC Buck Converter with Reliable Hysteretic-Mode Control and Dual Modulator for Fast Dynamic Voltage Scaling," IEEE 52nd International Midwest Symposium on Circuits and Systems, Aug. 2009, pp. 941 - 944.

·    Jinwoo Kim, Moo-Young Kim, Ho-Kyu Lee, Inhwa Jung, and Chulwoo Kim, "Low-power Architecture for A 6-bit 1.6GS/s Flash A/D Converter," IEEE 27th International Conference on Consumer Electronics, Jan. 2009, p-2-7.

·    Yongtae Kim, Junyoung Song, Woonhyung Heo, and Chulwoo Kim, "An Efficient Architecture of Encoder and Decoder for DisplayPort Physical Layer," IEEE 27th International Conference on Consumer Electronics, Jan. 2009, pp. 10.2-3.
　

2008

·    Taeyoon Kim, Wonki Park, Heesun Ahn, Kyongwon Min, Sangyong Lee, Jongchan Choi, Chulwoo Kim, Kynnyun Kim, Sungchul Lee, "A 110dB, 3-mW Fourth-order Sigma-Delta Modulator for Atmospheric Pressure Sensor," IEEE International Symposium on System-on-Chip, Nov. 2008, pp. 49-52.

·    Hyunsoo Chae, Dongsuk Shin, Kisoo Kim, Kwan-Weon Kim, Young Jung Choi, Chulwoo Kim, "A Wide-Range All-Digital Multiphase DLL with Supply Noise Tolerance," IEEE Asian Solid-State Circuits Conference, Nov. 2008, pp. 421-424.

·    Moo-Young Kim, Jinwoo Kim, Tagjong Lee, and Chulwoo Kim, "10-bit 100MS/s CMOS Pipelined A/D Converter with 0.59pJ/Conversion-Step," IEEE Asian Solid-State Circuits Conference, Nov. 2008, pp. 65-68.

·    Minyoung Song, Sunghoon Ahn, Inhwa Jung, Yongtae Kim, and Chulwoo Kim, "A 1.5 GHz Spread Spectrum Clock Generator with 5000ppm Piecewise Linear Modulation," IEEE Custom Integrated Circuits Conference, Sep. 2008, pp. 455-458.

·    Sunghwa Ok, Jungmoon Kim, Gilwon Yoon, Hyunho Chu, Jaegeun Oh, Seon Wook Kim, and Chulwoo Kim, "A DC-DC Converter with a Dual VCDL-based ADC and a Self-Calibrated DLL-based Clock Generator for an Energy-Aware EISC Processor," IEEE Custom Integrated Circuits Conference, Sep. 2008, pp. 551-554.

·    Dongsuk Shin, Won-Joo Yun, Hyun-Woo Lee, Young-Jung Choi, Suki Kim, and Chulwoo Kim, "A 0.17-1.4GHz Low-Jitter All Digital DLL with TDC-based DCC using Pulse Width Detection Scheme," European Solid-State Circuits Conference, Sep. 2008, pp. 82-85.

·    P.T.Hong, Phi-Hung Pham, Xuan-Tu Tran, Chullwoo Kim, "Analysis and Evaluation of Traffic-Performance in Backtracked Routing Network-on-Chip," International Conference on Communications and Electronics, Jun. 2008. pp. 13-17.
  

2007

·    Kyunghoon Chung, Jabeom Koo, Soo-Won Kim, and Chulwoo Kim, "An Anti-Harmonic, Programmable DLL-Based Frequency Multiplier for Dynamic Frequency Scaling," IEEE Asian Solid-State Circuits Conference, Nov. 2007, pp. 276-279.

·    Moo-Young Kim, Dongsuk Shin, Hyunsoo Chae, Sunghwa Ok, and Chulwoo Kim, "A Low-Jitter Open-Loop All-Digital Clock Generator with 2 Cycle Lock-Time," IEEE Custom Integrated Circuits Conference, Sep. 2007, pp. 369-372.
  
·    Hyunsoo Chae, Sangdon Jung, and Chulwoo Kim, "A Wide-Range Duty-Independent All-Digital Multiphase Clock Generator," European Solid-State Circuits Conference, Sept. 2007, pp. 186-189.

·    Gil-Su Kim, Chulwoo Kim, and Soo-Won Kim "A Low Spurious 14.4mW 1.8GHz CMOS FVC-Based Clock Generator for Portable SoC Processors," IEEE Asian Solid-State Circuits Conference, Jul. 2007, pp. 308-311.
    
·    Young-Ho Kwak, Inhwa Jung, Hyung-Dong Lee, Young-Jung Choi, Yogendera Kumar, and Chulwoo Kim, "A one-cycle time slew-rate controlled output driver," IEEE International Solid-State Circuits Conference, Feb. 2007, pp.408-409.

·    Dongsuk Shin, Janghoon Song, Hyunsoo Chae, Kwan-Weon Kim ,Young Jung Choi, and Chulwoo Kim, "A 7 ps Jitter 0.053 mm2 Fast-Lock All-Digital DLL with Wide-Range and High-Resolution All Digital DCC," IEEE International Solid-State Circuits Conference, Feb. 2007, pp.184-185.
 

2006

·    Phi-Hung Pham, Yogendera Kumar, and Chulwoo Kim, "A Compact and High-Performance Switch for Circuit-Switched Network-on-Chip," IEEE International SOC Conference (SOCC), Sep. 2006, pp. 53-56.
 
·    Phi-Hung Pham, Yogendera Kuma, and Chulwoo Kim, "High Performance and Area-Efficient Circuit-Switched Network on Chip Design," 6th IEEE International Conference on Computer and Information Technology(CIT), Sep 2006, pp. 243-243.    

·    Janghoon Song, Gilwon Yoon, and Chulwoo Kim, "An Efficient Adaptive Digital DC-DC Converter with Dual Loop Controls for Fast Dynamic Voltage Scaling," IEEE Custom Integrated Circuits Conference, Sep. 2006, pp. 253-256.   
 
·    Inhwa Jung, Gunok Jung, Janghoon Song, Moo-Young Kim, Sung Bae Park, and Chulwoo Kim, "A 0.004mm2 Portable Multiphase Clock Generator Tile for 1.2GHz RISC Microprocessor," IEEE Symposium on VLSI Circuits (SOVC), Jun 2006, pp. 130-131.    
　

2005

·    Moo-Young Kim, Inhwa Jung, Young-Ho Kwak, Sunghoon Ahn, Chulwoo Kim, “Differential Pass Transistor Pulsed Latch “, IEEE International SOC Conference 2005, Sep 2005, pp. 297-300.
 
·    Inhwa Jung, Moo-Young Kim, Dongsuk Shin, Seon-Wook Kim, Chulwoo Kim, "A New EDP-Aware Storage Element," International Technical Conference on Circuits/Systems, Computers and Communications 2005, Sep 2005, vol 1, pp. 153-154.

·    Jin-Han Kim, Young-Ho Kwak, Seok-Ryung Yoon, Moo-Young Kim, and Chulwoo Kim, “A CMOS DLL-Based 120MHz-1.8GHz Clock Generator for Dynamic Frequency Scaling “, IEEE International Solid-State Circuits Conference 2005, Feb 2005, pp. 516-517.

·    Dae-Seok Byeon, Sung-Soo Lee, Young-Ho Lim, Jin-Sung Park, Wook-kee Han, Pan-Suk Kwak, Dong-Hwan Kim, Dong-Hyuk Chae, Seung-Hyun Moon, Seung-Jae Lee, Hyun-Chul Cho, Jung-Woo Lee, Moo-Sung Kim, Joon-Sung Yang, Young-Woo Park, Duk-Won Bae, Jung-Dal Choi, Sung-Hoi Hur, Kang-Deog Suh, "An 8Gb Multi-Level NAND Flash Memory with 63nm STI CMOS Process Technology," IEEE International Solid-State Circuits Conference 2005, Feb 2005, pp. 46-47.
　

2004

·    Seok-Soo Yoon, Seok-Ryoung Yoon, Seon-Wook Kim, Chulwoo Kim, “Charge-Sharing-Problem Reduced Split-Path Domino Logic”,
IEEE Conference on VLSI Design 2004, pp. 201-205.

·    Tae-Chan Kim, Chulwoo Kim, Bong-Young Chung, and Soo-Won Kim, "A low-power cache with successive tag comparison algorithm," Current Applied Physics, Jul. 2004, pp. 227-230.

2003

·    Seok-Soo Yoon, Seok-Ryoung Yoon, Soo-Won Kim, Chulwoo Kim, "Noise-Aware Domino Logic Design for Deep Submicron Technology", IEEE Conference on Electron Devices and Solid-State Circuits 2003, pp. 277-280.
　

~2002

·    Chulwoo Kim, In-Chul Hwang and Steve Kang, “Low-Power Small-Area ±7.28 ps Jitter DLL-based Clock Generator”, IEEE International Solid-State Circuits Conference, Feb. 2002, pp. 1414-1420.

·    Chulwoo Kim and Steve Kang, "A Low-Swing Clock Double Edge-Triggered Flip-Flop," IEEE International Symposium on VLSI Circuits, Jun. 2001, pp. 183-186.

·    Seung-Moon Yoo, Chulwoo Kim, Seong-Ook Jung, Kwang-Hyun Baek and Steve Kang, "New Current Sense Amplifier for High Density DRAM and PIM Architectures," IEEE International Symposium on Circuits and Systems, May 2001, pp. 938-941.

·    Chulwoo Kim and Steve Kang, "A Low-Power Reduced Swing Single Clock Flip-Flop ," IEEE International Symposium on Circuits and Systems, May 2001, pp. 806-809.

·    Chulwoo Kim, Kiwook Kim, and Steve Kang, “Energy Efficient Skewed Static Logic (S2L) Design with Dual Vt," IEEE International Symposium on Circuits and Systems, May 2001, pp. 64-70.

·    Chulwoo Kim, Jaesik Lee, Kwang-Hyun Baek, Eric Martina and Steve Kang, "High-Performance, Low-Power Skewed Static Logic in Very Deep Submicron Technology," IEEE International Conference on Computer Design, pp. 59-64, 2000.

·    Chulwoo Kim, Jaesik Lee, Kwang-Hyun Baek, and Steve Kang, "Low-Power Skewed Static Logic (S2L) with Topology Dependent Dual Vt," IEEE ASIC/SOC conference, pp. 310-314, 2000.

·    Chulwoo Kim, Seong-Ook Jung, Kwang-Hyun Baek, and Steve Kang, "Parallel Dynamic Logic (PDL) and Speed-enhanced Skewed Static(SSS) Logic," IEEE International Symposium on Circuits and Systems, pp. 756-759, 2000.

·    Chulwoo Kim, Seung-Moon Yoo, Steve Kang, "NMOS Energy Recovery Logic," 1999 IEEE Great Lake Symposium on VLSI, pp. 310-313, 1999.

·    Boeun Kim, Chulwoo Kim, Sangchan Han, Soowon Kim, "1.2um Non-epi CMOS Smart Power IC with Four H-Bridge Motor Drivers for Portable Applications," IEEE International Symposium on Circuits and Systems, vol 1. pp. 633-636, 1996.